In the previous part we created an FPGA design that runs NEORV32 and is capable of booting Zephyr. Let’s improve it by adding an SPI block and external memory.
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Running Zephyr RTOS on NEORV32 Soft Processor
The last time I was playing with an FPGA I connected Basys 3 and Raspberry Pi. It’s time to increase the difficulty a bit and create our SoC using FPGA.
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